OSI Layer 1

 Please be advised that this article is work-in-progress. The information here may be vague, incomplete, misleading or plainly wrong.  -> PHYSICAL LAYER -> defines physical characteristics of the medium used to transfer data between devices. -> basically, while layers two to seven of OSI deal with the logical part of a network (bits), layer one deals with the physical part. -> as an example, Physical Layer deals with jacks, plugs, connectors, fiber cables, copper cables, light pulses, voltage signals, modulated RF energy, modems, cell tower and sattelites antennas, etc. -> Physical layer standards address three areas -> physical components -> NICs, media and hardware used to transmit the signals which are interpreted as bits. -> encoding -> the pattern used to convert the data message into another format suitable for transmission across the physical medium. -> as analogy, encoding is like using Morse code (pattern) to transmit a message, transforming the words in dots and dashes. -> "a strong electrical pulse is a 1, a weak electrical pulse is a 0" -> the rules used to interpret the variation in electrical signal as bits (copper) -> process -> the final frame (slice of data) is received by L1 from L2									       	 -> layer 1 'encodes' transforms the logical data received into electrical signals, light pulses or rf waves, according to a pattern -> signaling -> the way the encoded bits are represented over the medium. -> can be as electrical impulses (copper), light waves (fiber), microwave signals (wireless) -> as analogy is like using a longer flashes of light to represent dashes and shorter flashes to represent dots in morse code. -> "what exactly is a strong electrical pulse and what is a weak electrical pulse" -> Example Physical Layer standards -> 4G LTE/5G -> 802.11 (Wi-Fi) -> 802.3 Ethernet -> A family of originally LAN networking standards and protocols -> Example -> at Layer 1 -> UTP cables, RJ-45 connectors, optical fiber cables and connectors, Ethernet PHY -> at Layer 2 -> the Ethernet frame -> Ethernet PHY Diagrams -> 1. Overview of L1 and the and the connections to L2 and the medium.

+---+				                                                                        |			 |				                                                                         |			 |				                                                                         |	MAC chip         | |  (Data link layer)   | |			 |				                                                                        +---+				                                                                                |         |				                                                                                |   MII   | |        |				                                                                         +---+    -+ 				                                                                         |	   PCS		 |     | +---+    |					                                                                         +---+     |				                                                                         |	   PMA		 |     \      PHY chip +---+    /  (Physical layer) +---+    |				                                                                         |	   PMD		 |     | +---+   -+				                                                                                |         |				                                                                                |   MDI   | |	 |				                                                                         +---+				                                                                         |    Medium connector   | +---+		                                                                                                 -> please note that -> for simplicity reasons, the diagram and its explanation present each layer as being implemented by a single chip -> however, based on the manufacturer and the product, a set of chips may be used to implement a single layer -> also, it is possible that a single chip can be used to implement both PHY and MAC functionalities. -> MAC chip -> electronic circuit that implements the functions of the Data Link Layer (layer 2) -> MII -> Media Independent Interface -> is an interface whose purpose is to interconnect the MAC layer (circuits) and the PHY layer (PHY chip) -> being 'media independent', it allows different types of PHY chips to be integrated without changing the MAC hardware. -> it was a defined as a standard to connect FastEthernet capable MAC hardware to PHY hardware. -> it has multiple variants such as RMII (reduced MII), GMII (Gigabit MII), XGMII (10 gigabit MII) -> MII interface also includes the MDIO bus -> Management Data Input/Output -> used for transfering management information between MAC and PHY (such as autonegotation, and link status information) -> PHY chip -> electronic circuit used to implement the functions of the physical layer -> Sublayers -> The PHY functions are separated in three major sections (sublayers) -> PCS -> Physical Coding Sublayer -> responsible for -> encoding, scrambling (if used) and serializing data from MAC, and sending it to PMA (Tx channel) -> deserializing, descrambling (if used) and decoding the data from PMA, and sending it to MAC (Rx channel) -> monitoring the Tx and Rx paths to detect when the interface is active -> signal the occurence of a collision to the MAC layer -> implements auto-negotiation together with PMA -> PMA -> Physical Medium Attachment sublayer -> responsible for -> converting the encoded Tx bit stream from the PCS sublayer to the appropriate data symbols for transmission on the medium -> convert incoming data symbols from the medium (PMD) into bits and pass them to PCS sublayer -> determines the link status and sends it to the PCS -> clock recovery -> detecting error events -> optionally, implements the Far End Fault Detect mechanism (FEFD can be implemented only if autonegotiation is NOT supported) -> implements auto-negotiation together with PCS -> PMD -> Physical Medium Dependent -> may not always be implemented, based on the specific version of the standard implemented by the PHY (802.3bw Ethernet standard lacks a PMD sublayer) -> if missing, its functions are implemented in the PMA -> responsible for -> converting the Tx symbols to the physical signals used by the medium (electric signals, light signals) (Tx path) -> converts the received signals to Rx symbols (Rx path) -> implements the functions that support the PHY's physical connection to the network -> signal transmission and receival -> modulation and wave shaping -> signal amplification

COPPER CABLES -> are susceptible to interferences from: -> EMI and RFI -> electromagnetic interference & radio frequency interference -> distorts and corrupts the signal -> potential sources are radio waves and electromagnetic devices -> Crosstalk -> electrical signal passes through one wire and creates an electric or magentic field -> the created field interferes with the signal on an adjacent wire -> basically, the EMI between wire pairs in the same cable. -> countered by wire twisting

-> copper cables types -> Coaxial -> components -> copper conductor at the core -> plastic insulation that surrounds the conductor -> woven copper braid or metallic foil -> acts as the second wire in the circuit -> shields the inner conductor agains EMI -> outer cable jacket -> is used for -> wireless installations to carry the radio signal from the antennas to the radio equipment -> cable internet installations -> the wiring inside the customer premises uses Coaxial cable. -> STP (shielded twisted-pair) -> uses braided or foil shielding to protect against EMI/RFI -> basically Shielded UTP. -> UTP -> copper cables used for Ethernet -> Collection of network protocols (logical rules, L2 Ethernet) and standards (physical rules, L1 Ethernet) -> L1 standards for copper Ethernet cables -> IEEE 802.3i -> 10BASE-T   -> 10 Mbps  -> 100m -> Ethernet -> IEEE 802.3u -> 100BASE-T  -> 100 Mbps -> 100m -> Fast Ethernet -> IEEE 802.3ab -> 1000BASE-T -> 1 Gbps  -> 100m -> Gigabit Ethernet -> IEEE 802.3an -> 10GBASE-T -> 10 Gbps  -> 100m -> 10 Gig Ethernet -> BASE -> baseband signaling -> -T -> twisted pair (the medium is copper twisted wires) -> RJ45 -> Registered Jack 45 -> the connectors used for copper Ethernet cables -> 8 pins for the 8 wires in an ethernet copper cable -> name -> U -> UNSHIELDED -> wires have no metallic shielding which makes them vulnerable to EMI (electromagnetic interference) -> T -> TWISTED -> P -> PAIR -> 4 pairs of wires twisted together = 8 wires in total. The twisting protects the cables against EMI -> has two types -> Straight-through -> has the same UTP to RJ45 wiring standards on both ends -> connects the RJ45 pins from both ends of the cable identically (pin 1 to pin 1, pin 2 to pin 2 etc) -> Crossover -> has a different wiring standard for each end -> connects pins from one end to different pins of the other end as follows: -> 1 -> 3 -> 2 -> 6																	    	        -> 3 -> 1																		        -> 4 -> 4																		        -> 5 -> 5																		        -> 6 -> 2																		        -> 7 -> 7																		        -> 8 -> 8							     -> Rollover -> is cisco propietary cable. Not an acutal "type". -> used for connecting to console ports. -> there are two standards used for UTP -> RJ45 wiring : -> T568A -> left to right, pins 1 to 8 correspond to colors: WGr - Gr - WOr - Bl - WBl - Or - WBr - Br												     -> T568B -> left to right, pins 1 to 8 correspond to colors: WOr - Or - WGr - Bl - WBl - Gr - WBr - Br				       	     -> UTP have categories according to their performance: -> Category 3 -> Category 5 -> 100 Mbps 5e -> 1000 Mbps -> Category 6 -> added separator between each pair (STP) -> 10 Gbps -> Category 7 -> 10 Gbps -> Category 8 -> 40 Gbps

-> 10BASE-T (Ethernet) and 100BASE-T (Fast Ethernet) -> standards use only 2 pairs of wires for transmitting and receiving data -> A PC/Router/AP Ethernet interface uses pins 1 and 2 to Transmit (Tx) and pins 3 and 6 to Receive (Rx) -> A switch/hub interface uses uses pins 1 and 2 to Receive (Rx) and pins 3 and 6 to Transmit (Tx) -> different pins for transmitting and receiving data allows for a FULL DUPLEX connection -> cable usage -> router/pc to a switch (two different kinds of devices/routing port to switchport) -> straight-through cable can be used because the two devices have different pins for Tx and Rx -> a device to the same kind of device (router-router, pc-router, switch-switch/routing port-porting port or switchport-switchport) -> a crossover cable must be used, which connects the Tx pins of one device to the Rx pins of the other. -> a straight-through cable would connect the Tx pins of one device to the Tx pins of the other device. Same for Rx pins. -> Audto-MDIX -> automatic medium-dependent interface crossover -> allows the device to detect the cable type and configure its own Tx and Rx pins -> the switch automatically detects the type of cable attached to the port and configures the interfaces accordingly -> any type of cable can be used (straight or crossover) to connect the devices -> this feature makes the crossover cable a legacy solution. -> 1000BASE-T and 10GBASE-T -> standards use all 4 pairs of wires for Tx and Rx. -> communication on all 4 pairs of wires is bidirectional (no dedicated wires for Rx and Tx)

FIBER OPTIC -> usually, to support full-duplex conection, a fiber optic patch bundles two optical fiber cables (Tx and Rx) because light can travel in one direction at a time over fiber. -> recent standarts such as 100BASE-BX use different wavelengths for Tx and Rx over a single fiber and can be used with both SMF or MMF -> used for enterprise networks backbone cabling, fiber-to-the-home (FTTH), long-haul networks, submarine cable networks. -> is more expensive than UTP but features less attenuation and is immune to RFI and EMI. -> Ethernet fiber optic standards -> IEEE 802.3z -> 1000BASE-LX -> 1 Gbps  -> Single-Mode -> 5km -> Multimode  -> 550m -> IEEE 802.3ae -> 10GBASE-SR -> 10 Gbps -> Multimode   -> 400m -> IEEE 802.3ae -> 10GBASE-LR -> 10 Gbps -> Single-Mode -> 10km -> IEEE 802.3ae -> 10GBASE-ER -> 10 Gbps -> Single-Mode -> 30km -> has tow types -> Single-Mode Fiber (SMF) -> very small core -> uses laser technology to send light at a single angle (a single mode) -> used in long-distance situations (hundreds of kilometers) -> Multimode Fiber (MMF) -> larger core and uses LED transmitters -> allows for multiple angles (modes) of light waves to enter the core -> has greater light dispersion through the core which is why can be used on shorter distances than SMF Fiber-optic cable components -> core (fiberglass) -> light travels through the core to transmit data -> Fiber optic MODE -> refers to the pattern the light is guided through the core. -> more specifically to the angle the light rays enter the core and the refraction. -> cladding -> surrounds the core -> reflects light reaching it, back into the core -> protective buffer -> strenghtener -> outer jacket -> final component of the cable -> yellow for single-mode -> orange or aqua for multi-mode.

Transceiver -> the port (physical itnerface) hardware -> types -> SFP (small form-factor pluggable) transceiver -> module which can be plugged in a networking device. -> allows connection to a fiber-optic cable -> refered to as Mini-GBIC -> regarded as the improved modern version of GBIC modules -> used on Gigabit interfaces -> SFP+ -> same as SFP -> used for 10-Gbps interfaces -> GBIC -> the old removable transceivers -> replaced by SFP SERIAL -> cables -> DTE -> straight-through serial cable -> DCE -> crossover serial cable -> DTE -> Data Terminal Equipment -> the equipment which slaves itslef to the clocking signal -> in an enterprise environment, it would be the ROUTER connected to the CSU/DSU -> in a PC-to-router link, it would be the PC	  -> DCE -> Data Carrier Equipment (called Data communications, data circuit-terminating equipment) -> devices used to establish, maintain and terminate communication sessions between a data source and its destination. -> it supplies the clock signal -> in an enterprise environment, it would be the CSU/DSU -> in a PC-to-router link, it would be the router PoE -> Power over Ethernet -> refers to the concept of providing electrical power to a device via the same Ethernet cable used for data transmission -> IEEE Poe Standards extend the IEEE Autonegotiation mechanisms -> the autonegotiation of PoE standard has to take place befor the device boots. -> the autonegotiation results in the PD signaling to the PSE how much power it needs to function. -> mechanics -> typically a LAN switch acts as the Power Sourcing Equipment (PSE) -> it provides DC power over the Ethernet cable -> the device capable of being supplied via an Ethernet cable is called Powered Device -> PoE steps -> do not supply PoE unless the negotiation says so							 -> use the Ethernet autonegotiation techniques to determine the PoE power class -> if the device is a PD, then supply the power corresponding to the PoE class determined via autonegotiation -> the power class is monitored (CDP/LLDP) and if it changes, then the power supplied is adjusted. -> when the power consumption on a switchport exceeds the maximum administrative value, the port is placed in an err-disabled state and a syslog message is generated -> advantages -> easier to power devices placed in remote places such as wireless access points and video cameras -> reducing expenses -> less electrical outlets are needed to support the infrastructure -> less power cables -> a PSE automatically converts the AC power to DC. -> standards -> PoE -> 802.3af -> 15 watts over 2 pairs of wires -> PoE+ -> 802.3at -> 30 watts over 2 pairs of wires -> UPoE -> 802.3bt -> 60 watts over 4 pairs of wires -> UpoE+ -> 802.3bt -> 100 watts over 4 pairs of wires -> PoE infrastructure planning steps -> Powered Devices -> their types, models and power requirements -> Power Requirements -> how much power is required from each PSE and if it can supply that much -> Switch Ports -> how many ports of a switch support PoE and if they are enough to support all the PD										 -> Switch Power Supplies -> create a power budget per switch that include the power needed by the switch + all the PD																 -> the power supply chosen for the switch must meet the power budget requirements -> PoE standards versus actual -> which power standards the PSE and PD support -> the PD may actually need less power than the standard it support

LAYER 1 TROUBLESHOOTING

-> INTERFACE -> Line Status    -> Layer 1 | STATUS   -> Protocol Status -> Layer 2 | -> disabled -> "Administratively down" | -> "Down"                 | -> (config-if)# shutdown -> notconnect -> "down" | -> "down" | -> no cable -> bad cable -> wrong cable pinouts -> speed mismatch -> neigbouring device is off -> error disabled -> notconnect -> "up"  | -> "down" | -> doesn't apply to switches -> in routers it signifies a mismatched data-link layer configuration (like different L2 protocols for each end of the link) -> err-disabled -> "down"              | -> "down(err-disabled)" | -> interface disabled by port-security -> connected -> "up" | -> "up" | -> interface is working -> COUNTERS -> RUNTS -> frames smaller than 64 bytes -> could indicate collisions -> GIANTS -> frames larger than 1518 bytes -> INPUT ERRORS -> total of other counters -> CRC -> frames received that didn't pass the FCS -> could indicate collisions -> could indicate EMI or damaged cables -> FRAME -> corrupted received frames -> -> could indicate collisions -> PACKETS OUTPUT -> frames forwarded -> OUTPUT ERRORS -> frames that couldn't be forwarded -> COLLISIONS -> collision that occured at forwarding -> LATE COLLISIONS -> collisions that occur after the 64th byte of a frame has been sent -> could indicate duplex mismatch (autonegotiation: auto - manual)

-> TROUBLESHOOTING -> duplex mismatch -> verify both ends of the link using -> # show running-config -> interface -> # show interface status -> # show interface -> verify if both ends are using autonegotiation -> IEEE 802.3u protocol -> auto - auto OK -> best settings both devices support -> manual - manual -> matching settings OK											                 -> settings do not match FAIL -> auto - manual -> speed -> sense the speed (no autonegotiation) but if you can't use the slowest supported speed. -> half duplex if above speed is 10/100 or full duplex for greater speeds. -> this may cause a duplex mismatch -> example -> host using 100mbps full duplex manual settings -> switch automatically sets 100mbps or lower and half duplex -> duplex mismatch -> switch shows the port state as up|up -> autonegotiation is disabled by manually configuring both settings -> increasing counters -> indicates problems on full duplex links -> normal on half-duplex links -> late collisions must still be verified. -> if the speed and duplex settings are ok, it could indicate damaged cables or EMI.

-> references -> https://en.wikipedia.org/wiki/Media-independent_interface -> https://www.synopsys.com/designware-ip/technical-bulletin/ethernet-dwtb-q117.html -> https://networkengineering.stackexchange.com/questions/57746/what-is-the-use-of-phy-and-mac-chip -> https://networkengineering.stackexchange.com/questions/22650/where-do-the-layers-of-the-osi-model-operate-in-the-operating-system -> https://www.youtube.com/watch?v=JH3cMYErmKI -> https://networkengineering.stackexchange.com/questions/22650/where-do-the-layers-of-the-osi-model-operate-in-the-operating-system/

-